RTC clock synchronization buffer driver delay chip

The MC14541B programmable timer includes a 16-stage binary counter, integrated oscillator for an external capacitor and two resistors, automatic power-on-reset circuitry, and output control logic. Timekeeping is initialized by power-on, at which point power-on-reset is enabled and the counter is initialized within the specified VDD range. When the power is turned on, an external reset pulse can be applied. When the initial reset command is issued, the oscillator will oscillate at a frequency determined by the external RC network. This 16-stage counter divides the oscillator frequency (focs) by the nth stage frequency equals fosc/2n.

Low Jitter Dual Network Synchronizer Clock 64-VQFN -40 to 85